Search - code verilog mips

[ARM-PowerPC-ColdFire-MIPS] signal_cpu_sort

Description: Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.-Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.
Platform: | Size: 8192 | Author: 張大小 | Hits:

[VHDL-FPGA-Verilog] miniMIPS

Description: 这是一个基于mips-I结构的处理器,32bit,冯诺依曼结构-This is based on a MIPS- I structure of the processor, 32bit, von Neumann structure
Platform: | Size: 222208 | Author: tsm998 | Hits:

[Other] arm7-verilog

Description: 这是arm7处理器的verilog全代码，仔细研究一下，会对CPU和verilog均有很大的裨益。-This is ARM7 processor Verilog-wide code carefully, CPU and Verilog will have great benefits.
Platform: | Size: 37888 | Author: 王云 | Hits:

[ARM-PowerPC-ColdFire-MIPS] verilog

Description: 8bit alu use verilog hdl
Platform: | Size: 8192 | Author: 周微微 | Hits:

[MPI] controller

Description: MIPS处理器的控制verilog代码，可综合，可仿真，属硬件描述语言，集成电路设计代码-MIPS control processor Verilog code can be integrated to simulation, a hardware description language, integrated circuit design code
Platform: | Size: 1024 | Author: 陈丰 | Hits:

[ARM-PowerPC-ColdFire-MIPS] oc8051.tar

Description: 8051的verilog源代码，verilog写的，文档齐全!-8051 Verilog source code, verilog written documentation complete!
Platform: | Size: 1508352 | Author: 刘志刚 | Hits:

[ARM-PowerPC-ColdFire-MIPS] MIPS

Description: 带分支预测的MIPS流水线的verilog原代码。详细介绍了流水线的设计代码-Branch prediction with the MIPS pipeline verilog source code. Details of pipeline design code
Platform: | Size: 17408 | Author: 张鹤 | Hits:

[Other] mipsdesign

Description: mips核代码，Verilog写的，希望对大家有用-mips core code, Verilog written
Platform: | Size: 5120 | Author: jack | Hits:

[VHDL-FPGA-Verilog] microprocessor

Description: 一个微处理器的Verilog代码，根据英文书籍《数字设计与架构》中的例子而写，能够运行MIPS指令，能正确执行跳转指令。通过modelsim仿真，含测试代码。-Verilog code for a microprocessor, according to the English book " Digital Design and Architecture" was written in the example, to run MIPS instructions to jump correctly. By modelsim simulation, with test code.
Platform: | Size: 208896 | Author: 楚寒 | Hits:

[VHDL-FPGA-Verilog] CPU

Description: 32位5级流水线CPU设计指令系统、指令格式、寻址方式、寄存器结构、数据表示方式、存储器系统、运算器、控制器和流水线结构等-32bit pipeline CPU
Platform: | Size: 187392 | Author: znl | Hits:

[VHDL-FPGA-Verilog] F10-Single-Cycle-MIPS

Description: This a verilog code of single cycle mips-This is a verilog code of single cycle mips
Platform: | Size: 587776 | Author: hualin | Hits:

[VHDL-FPGA-Verilog] cpu

Description: 5 stage pipeline CPU, verilog HDL code-5 stage pipeline CPU
Platform: | Size: 2048 | Author: dylan | Hits:

[SCM] the-verilog-source-code-of-8051-MCU

Description: 8051单片机的源代码,用verilog进行编写，包括测试文件-source code of 8051 MCU
Platform: | Size: 310272 | Author: 许伟涛 | Hits:

[VHDL-FPGA-Verilog] SourceCode

Description: That s a bunch of ALU control code for MIPS pipelined in Verilog!
Platform: | Size: 3072 | Author: baocatsamac_77 | Hits:

[VHDL-FPGA-Verilog] MIPS-processor-Verilog-code

Description: 原创，MIPS处理器Verilog源码，在FPGA实现单周期MIPS处理器，实现存储访问指令load word(lw)和store word(sw)，算术逻辑指令add、addi、sub、and、or和slt跳转指令branch equal(beq)和jump(j)-Original, achieves single-cycle MIPS processor MIPS processor Verilog source code, the FPGA, storage access instructions load word (lw) and store word (sw) arithmetic logic instructions add, addi, sub, and, or, and slt jump instructionbranch equal (beq, which) and jump (j)
Platform: | Size: 7168 | Author: ZLS | Hits:

[VHDL-FPGA-Verilog] pipelinecpu_final-and-tested

Description: verilog code of Mips pipelined micrprocessor.
Platform: | Size: 4096 | Author: Atif | Hits:

[Other] code

Description: 是用verilog写的带uart的简单controller，使用的是mips指令，用modelsim仿真，波形正确-With uart verilog write a simple controller, use the mips instruction the modelsim simulation, waveform correctly
Platform: | Size: 72704 | Author: 张三 | Hits:

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